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? semiconductor components industries, llc, 2000 november, 2000 rev. 0 1 publication order number: and8039/d and8039/d the one-transistor forward converter prepared by: marty brown introduction the onetransistor forward converter is the most elementary form of transformerisolated buck converter. it is typically used in of fline applications in the 100300 watt region. this application note illustrates the approach one would take to design a high dc input voltage, onetransistor forward converter. with additional modifications, it could be made work as a 110 vac offline power supply. description of operation a simplified schematic of a onetransistor forward converter can be seen in figure 1. control reset winding c in + + + v sw i sw +v in gnd d1 d2 l o +v out gnd c out figure 1. simplified schematic of a one transistor forward converter one can see a transformer has been placed between the input voltage and a buck converter output stage. the power switch (sw) is used to create a rectangular voltage waveform whose amplitude is the input voltage and its duty cycle is the controllable variable. the transformer provides both a stepup or down function and a safety dielectric isolation between the input line and the output load. the major restriction of this topology is the maximum duty cycle must be about 50 percent. whenever a core is driven in a unidirectional fashion, that is, current only being driven from one direction into the primary, the core must be reset . magnetization energy which serves only to reorient the magnetic domains within the core must be emptied, or else the core will awalkupo to saturation after a few cycles. to do this, one needs to reset the core. resetting is done by drawing current from a winding during the period when the transformer is unloaded, that is, when the power switch and rectifiers are not conducting. any winding can provide the reset function, but the higher the voltage on the winding, the quicker the core will reset. typically, this is the primary winding or a separate reset winding of equal turns to the primary. current from the reset winding can then be returned to the input capacitor and reused during the next cycle of operation. the typical switch voltage and current can be seen in figure 2. when the power switch is on, the switch sees the output filter inductor's current reflected by through the transformer. the amplitude of the primary current is the output rectifier current times turns ratio of the transformer (n1/n2) plus a small amount of magnetization current. during the power switch off time, the switch voltage aflyso up to about twice the input voltage. during this time, the reset winding begins to output magnetization current back to the input capacitor. http://onsemi.com application note
and8039/d http://onsemi.com 2 switch voltage switch current v in magnetization current reset figure 2. power switch waveforms the output rectification and filter section works identically to the buck converter. the voltage waveform of secondary looks like an inverted primary winding waveform except the zero voltage point is the input voltage point on the primary waveform. the waveform goes positive when the power switch is conducting. the output rectifier also conducts during this time. this presents a unipolar, pwm rectangular voltage signal to the inductor, just as found in a typical buck converter. the catch diode then operates when the power switch and the output rectifier are off. continuous current is then maintained through the output filter inductor. design of the onetransistor forward converter please refer to the schematic in figure 5 when component designations are mentioned. design specifications: input voltage range: +140+200 vdc output voltage: +28 vdc output current: 0.5 a4.0 a max. output ripple voltage: 30 mv predesign estimates: output power: p out(max) = (v out )(i out(max) ) = 112 watts peak input current: i pk 2.8 p out /v in(min) = 2.24 amps average input currents: i av(low) = p out /eff(v in(max) ) = 0.66 amps i av(hi) = p out /eff(v in(min) ) = 0.94 amps design of the transformer one begins with the transformer for every switching power supply design. all of the needed parameters are now known and it serves as the backbone for the remainder of the design. one must first select a core family that will house the transformer. this is done first by reviewing various core styles and their attributes. the most common offline core is the ee core, for which there are several variations. the standard ee core is based upon the old 5060 hz lamination core styles, which are very adequate for most applications. there are some lowprofile styles such as the philips efd family which yields a very trim, low profile appearance, but can cost slightly more for the basic corebobbin sets. selecting an approximate core size is done by appreciating that first the core must have a suf ficient core crossectional area to contain the needed flux density to transport the power from the primary to the secondary winding(s). secondly, there must be enough winding area to contain the required turns of the needed wire gauges. thirdly, for of fline transformers, the core family must have the ability to meet the minimum creepage and clearance dimensions of the safety agencies after the transformer is finished. to begin, one would use an equation like equation 1 which is an artificial quantity derived from the product of the core crossectional area (a c) times the winding area(w a) . w a a c 0.7 (p out w d(pri) 10 8 ) fb max (usa) (eq. 1a ) where: w d(pri) is the average wire diameter needed to carry the primary current in cm. b max is the maximum operating flux density in gauss (webers/cm 2 ) in the mks system (europe and the rest of the world) w a a c 0.7 (p out w d(pri) ) fb max (eq. 1b ) where: w d(pri) is the average wire diameter needed to carry the primary current in meters (m). b max is the maximum operating flux density in teslas (webers/m 2 ) the result is in cm 4 (eq. 1a) or m 4 (eq. 1b). the core manufacturers usually provide the w a a c for each core size. the core size can then be chosen and should be as large or larger than this result. for offline applications, of which this is not, one should increase the result by about 20 percent to accommodate the added insulating tape needed for an iecqualified transformer. also, a core and bobbin set must be used that has sufficient creepage (distance over a surface) and clearance (distance through air) dimensions. for 110220 vac applications, this is 3.2 mm between phases, and 8.0 mm between the input and output circuits. this may be difficult determining the offlinesuitability of a core and bobbin from its data sheet. in onetransistor forward converters, the operating flux density (b max ) dictates how much magnetization energy, which is not used, must be released by the core prior to the next power switch conduction cycle. this is a point of tradeoff, if b max is set too low, then there will be many turns on the transformer, thus making the transformer larger than it needs to be. setting b max too high, makes the transformer smaller, but increases the losses related to the core reset function. a good point of compromise is to set b max at about 25 percent of b sat at 100 khz. this level should be reduced by a factor of 0.04 per 100 khz above this frequency. one can then calculate the turns by: n pri (v in(nom) 10 8 ) 4fb max a c (us) (eq. 2a ) where: b max is in gauss (webers/cm 2 ) a c is the core crossectional area in cm 2
and8039/d http://onsemi.com 3 in the mks system (europe and elsewhere) n pri (v in(nom) ) 4fb max a c (eq. 2b ) where: b max is in teslas (webers/m 2 ) a c is the core crossectional area in m 2 this should be viewed as a nominalminimum turnscount since adding more turns lowers the operating flux density, which may be counterintuitive the average electricbased engineer. the reset winding is identical in turns to the primary winding and usually about 34 wire gauges smaller than that of the primary winding. it is phased oppositely from the primary so that it can discharge the magnetization energy when the power switch is off. the secondary turns needed for this application is found by realizing that the secondary voltage must provide an output waveform that will have a volttime average that will create the proper output voltage when presented to the lc filter. in other words, (dc max v out(min) ) plus the forward voltage drop of the output rectifier must be greater than the dc output voltage. this can be done by: n sec 1.1 n pri (v out v fwd ) v in(min) dc max (eq. 3) where: dc max is the maximum duty cycle of the system (<0.5) v fwd is the nominal forward voltage drop of the rectifier. the 1.1 factor provides a 10 percent margin in the supply's low voltage dropout point and also provides margin for other variations in the circuit. this secondary should be the main output which would then serve as the reference winding for all of the other secondary windings. one should round the result up to the next integer turn. when determining any additional secondary winding, one must account for each of the forward voltage drops of their respective rectifiers. this can be done by: n sec(n) n sec(1) (v out(n) v fwd(n) ) (v sec(1) (eq. 4) v fwd(1) ) the accuracy of each of the output voltages must now be considered. some variation can be gotten by changing the output rectifier technology, otherwise the turns can be adjusted by raising the reference secondary winding by a turn and adjusting the other windings. this is an iterative process done until the output voltages are within an acceptable tolerance and all of the windings are integer turns. this design example only has one output voltage. the auxiliary winding which provides power to the control ic, need not be regulated or accurate. it needs to only exceed the low voltage inhibit limit of the uc3845 which is 8.0 v at the low input voltage. peak rectifying the auxiliary winding in the forward conduction mode, yields a winding with 3.5 turns. lets round up to 4 and add a series resistor (about 100 ohms) and a 18 v zener diode across the auxiliary voltage filter capacitor to limit the maximum voltage. this will protect the gate of the power mosfet. in this example, an efd25 core will be used. the primary turns were calculated to be 41 turns of a #24 awg. the reset winding will be 41t of #28 awg. the secondary is 21 turns of 2 stands of #22 awg. the auxiliary winding will be 4 turns of #28 awg. the primary and reset windings will be wound first onto the bobbin. next the auxiliary winding is wound on top of these windings. three layers of mylar tape are applied to provide some degree of dielectric isolation (not quite iec), then the secondary winding will be applied last. a last layer of tape is added to provide some protection to the outer winding. a cautious note must be now conveyed, this design example is a nonisolated, highvoltage input power supply. it is for example only and cannot be built for sale because it does not meet the iec (ul csa or other) specifications for dielectric isolation and for creepage (the distance along a surface). to make this an offline one transistor forward converter, the input rectifier bridge, emi filter, an optoisolated feedback circuit, an optoisolated feedback circuit and the transformer would have to be built to iec specifications. selection of the power semiconductors power switch in onetransistor forward converters, the power switch will see twice the maximum input voltage plus any spikes caused winding leakage inductance, and rectifier forward and reverse characteristics. so the minimum v dss rating for the power mosfet is about: v dss(min) 2(v in(max) ) v clamp(est) 450 v the minimum drain current rating should be greater than just slightly less than slightly less than the maximum peak current. this is 2.24 a. another major consideration, especially for surface mount components, is the heat generated by the device. the r ds(on) and the drive circuit have the greatest influence on this. by overrating the drain current, some reduction in heat can be realized. this lessens the amount of pcb area needed to keep the junction temperature of the mosfet at a reasonable temperature (about +40+60 c). a reasonable estimation of the maximum r ds(on) assuming a heatsink area of twice the minimum footprint area is: r ds(on)(max) 3.3 ( t) (i in(av) ) 2 (theta (ja)) (eq. 6)
and8039/d http://onsemi.com 4 this results in a maximum r ds(on) of 3.5 ohms. so a summary of the mosfet ratings are: v dss > 450 v i d > 2.24 a r ds(on) < 3.5 ohms to further reduce the heat, an mtb8n50e was chosen. output rectifier the output rectifier will also be a surface mount d2pak. this efficiently couples the heat to the copper pad on the pcb. the maximum reverse voltage is: v r(min) v in(max) (n sec n pri ) 102 v the peak output current is: i out(pk) 2.8 i out(max) or 11.2 a the selected rectifier is the murb1620ct. design of the output filter section as in all forwardmode converters, the output is converted back to dc by the use of an lc filter. a twostage filter is going to be used which is a much more efficient output filter than a single stage filter. the abbreviated schematic is shown in figure 3. + d3 l1 +v out gnd c9 n1 n2 + l2 c10 + c11 t1 figure 3. schematic of the twostage output filter below the voltage feedback crossover frequency (f xo about 8.0 khz) all of the output capacitors appear to be essentially in parallel (i.e., c9, c10 and c11). the first stage inductor should be calculated such that it does not enter the discontinuousmode at light load. the secondstage filter has its corner frequency at about 22 khz and provides an additional 1520 db of ripple attenuation with little additional phase lag and no additional output capacitance. the first stage inductor should be sized to allow 20 percent of the ac ripple current through to the capacitor. this is a little more than is typically allowed, but the existence of the second filter provides a more pronounced effect, thus allowing the first filter to be smaller. l o (v sec(min) v out )t off(min) 1.4 i out(min) (eq. 4) where: v sec(min) is 1.1 v in(min) (n s /n pri ) the resulting minimum inductance is 88 uh. lets round this up to 100 uh which will give us a more standard value offtheshelf inductor and extend the minimum current capabilities of the supply. now one must choose an inductor whose core can be driven with 4+ amps on its winding without the fear of core saturation. coiltronics p/n ctx100252. next the output filter capacitor is calculated. in forwardmode converters, the roles of the output capacitor are transient holdup voltage and output ripple reduction. the output filter inductor greatly reduces the rms ripple current to the output capacitor(s) thus relaxing their ratings somewhat. the transient load holdup function is typically shared with other filter capacitors outside of the power supply. so the common method of calculating the value of the output filter capacitance is by the ripplereduction function. assuming a very benign load (resistor) and so that only the ripple is considered, one then calculates: c o i out(max) (1 dc max ) v ripple (eq. 5) where: v ripple is the desired pp ripple voltage on the output. this results in a total output capacitance of 533 uf. if one allocates about onethird of this value to the firststage filter and twothirds to the output, and roundingup to the next standard value, one gets c9, c10 and c11 as 220 uf, 50 vdc or nichicon part number evr2e470mpa which has a 430 ma rms ripple current rating. the secondstage filter inductance is determined by setting its pole above the crossover frequency of the closed feedback loop so that it will not contribute significant additional phase shift, but will further reduce the ripple voltage. if we set the output filter's filter pole at no more than 25 percent of the switching frequency and at least three times the filter pole of the firststage filter, then the nominal corner frequency of the secondstage filter is around 2025 khz. the secondstage filter inductor can then be found by: l o(2) (2 f p ) 2 (c10 c11) (eq. 6) setting the secondstage filter pole at 22 khz, the resulting secondstage inductor value is 0.1 uh. this can easily be done as an aircore inductor or a spiral pcb inductor, which is what i will do.
and8039/d http://onsemi.com 5 design of the primary current sensing network the uc3845, currentmode control ic is being used. its current sensing input has a maximum trip voltage of 1.0 volt when the currentmode circuit is just startingup. to minimize the losses associated with the current sensing resistance, one should use about a trip voltage of between 0.3 and 0.4 v. this results in a current sensing resistor of: rsc (r8) v trip i pk(max) 0.3 2.24 a 0.13 ohms make this value 0.1 ohms for a convenient offtheshelf value. a spike filter should be placed between the current sensing resistor (r8) and the ic. the time constant of this rc filter, if set too long, will enter a pulseskipping mode at light loads. if its time constant is made too short, then some spikes may still enter the current comparator and produce erratic pulsewidths. a time constant of 300 ns is a good time. one must first select one of the values. by making the r larger, one can provide some series protection between the power switch and the input pin of the ic. i will assign a value of 1.0 k to r7. the capacitor then becomes: c7 300 ns 1.0 k 300 pf design of the bootstrap startup circuit the purpose of this circuit is to initially start the control circuit up from a turnedoff state. the control circuit then would draw its power directly from the transformer. the most efficient circuit cuts off its startup current after the power supply has begun steadystate operation. this reduces an unnecessary loss. the circuit seen in the schematic (figure 5) is essentially a currentlimited, highvoltage, linear regulator. when the auxiliary power supply from the transformer is less than 10 v, the startup circuit is operational. when the auxiliary supply exceeds 10 v, it cuts off its collector current, which is about 1.0 ma. a 10 uf or greater capacitor (c2) must be placed on the auxiliary bus to store enough energy to actually start the supply, since the ic will draw about 10 ma in the operate mode. r1 = (vin(min)vz)/1.0 ma = (14012)/1.0 ma = 128 k make 120 k r2 = (vin(min)vz)/2.0 ma = 64 k make 62 k the zener diode (z1) is a 500 mw 12 v, 1n5242 the selection of high voltage bipolar small signal transistors is limited. an mpsw42 works nicely for q1. the purpose of d1 is to avoid stressing the baseemitter junction in the reverse direction, if the auxiliary voltage goes far above the +12 v base voltage. the typical reverse breakdown voltage (v (br)ebo ) is between 3.06.0 v. a 1n4148 is going to be used for d1. design of the voltage feedback and compensation design of the resistor divider the uc3845 has a 2.5 volt reference. one should set the value of the top resistor of the resistor divider (r11) between 2.0 k to 15 k ohms. this then makes the other values in the compensation network reasonable values. this can be done by selecting the sense current, that is the current allowed to flow through the resistor divider. as an estimate one can first calculate: isense (28 v 2.5 v) 7.0 kohms 3.65 ma using that sense current the lower resistor (r5) then becomes: r5 2.5 v 3.65 ma 684 ohms closest resistance 680 ohms the upper resistor is then: r11 (28.0 v 2.5 v) 3.65 ma) 6986 ohms or 6.98 kohms 1% design of the feedback loop compensation this is a currentmode controlled, forward converter where only a 1pole, 1zero method of compensation is required (2 poles if the op amp compensation is considered). this provides maximum of +90 degrees phase boost, which helps in avoiding unstable operation. determining the controltooutput characteristic the gain at dc for this topology is: a dc (v in v out ) 2 v in v e
(n sec n pri ) 13.5 g dc 20 log (a dc ) 22.6 db the output filter pole is: f fp 1 (2 r l c o ) 4.3 hz (light load (0.5 a)) 34.5 hz (rated load (4.0 a)) where: r l is the equivalent resistance of the load (v out /i out ) c o is the net value of the output capacitance (c9+c10+c11) the esr zero of the net output capacitance is: f z(esr) 1 (2 r esr c o ) 1 (2 (50 m ohms) (660 f)) 4822 hz where: r esr is all of the esr resistances in parallel. calculating the compensation elements locating the compensating breakpoints: f ez f fp(light load) 4.3 hz f ep f p(esr) 4.8 khz
and8039/d http://onsemi.com 6 the crossover frequency will be set at about 8.0 khz. to accomplish this, one assumes that the eventual closed loop bode gain response of the system will be 20 db/decade continuous slope. then one can calculate the amount of midband gain that the error amplifier must provide to apushupo or alowero the gain function so that the crossover frequency is set at 8.0 khz. this is done by: g xo 20 log(f xo f fp ) g dc 18.2 db converting this value to absolute gain for later use: a xo 10 [g xo 20] 8.13 now one can begin to calculate the actual error amplifier feedback component values. c5 1 2 f xo a xo r11 360 pf r4 a xo r11 56 k ohms c6 1 2 f ez r4 0.56 f figure 4. compensation bode plots for the example +80 +60 +40 +20 0 20 40 60 80 controltooutput light load closed loop 1.0 10 100 1.0k 10k 100k 1m controltooutput light load rated load error amp rated load 0 80 90 180 270 360 gain (db) phase ( )
and8039/d http://onsemi.com 7 u1 uc3845 reset winding c1 + +v in gnd + c12 l1 +v out gnd c9 1, 2 + l2 c10 + c11 t1 c2 + tp5 d3 r13 9 4, 5 8 10 10 r12 d4 v aux v aux z2 d1 z1 r1 r2 v cc r3 ref osc c3 c4 tp2 d5 8 7 4 tp6 tp7 r9 c8 q2 tp3 7 6 c7 r8 r8a r5 c6 r4 c5 comp v fb 125 3 tp1 tp4 figure 5. 112 watt, onetransisitor forward converter r11 r10 conclusion this application note illustrated the design steps needed to complete a onetransistor forward converter. this demonstration unit is only for instruction and to complete a design for the areal worldo one should also include: dielectric isolation from the input to output, an input rectification and filter section and some additional methods of protection.
and8039/d http://onsemi.com 8 bill of material designator part number manufacturer ratings description c1 uvr2e470mpa nichicon 250 v 47 f. electrolytic c2* uma1e100mda nichicon 25 v 10 f, tantalum c3 mr055c105jaa avx 50 v 0.1 f, ceramic c4 mr055c102jaa avx 50 v 1000 pf, ceramic c5 mr055c361jaa avx 50 v 360 pf, ceramic c6 mr055c564jaa avx 50 v 0.56 f, ceramic c7 mr055c301jaa avx 50 v 300 pf, ceramic c8* 68q101mdaaa avx 500 v 100 pf ceramic c9 uvr1h221mpa nichicon 50 v 220 f, electrolytic c10 uvr1h221mpa nichicon 50 v 220 f, electrolytic c11* uvr1h221mpa nichicon 50 v 220 f, electrolytic c12 68q101mdaaa avx 500 v 100 pf ceramic d1* 1n4148 on semiconductor 200 v, 0.1 a signal diode d2 1n4148 on semiconductor 200 v, 0.1 a signal diode d3* murb1620ct on semiconductor 200 v, 16 a dual ultrafast rectifier d4 1n4148 on semiconductor 200 v, 0.1 a signal diode j1* 570500 deltron banana socketblack j2 570500 deltron banana socketred j3* 570500 deltron banana socketblack j4 570500 deltron banana socketred l1 ctx100552 coiltronics 100 uh, 6 a inductor q1 mpsw42 on semiconductor 300 v, 0.1 a small signal bipolar q2 mtb8n50e on semiconductor 500 v, 8 a hv power mosfet r1* ok1245r52 ohmite 120 k resistor, 1/4 w r2* ok6235r52 ohmite 62 k resistor, 1/4 w r3 ok1535r52 ohmite 15 k w resistor, 1/4 w r4 ok5635r52 ohmite 56 k w resistor, 1/4 w r5 ok6815r52 ohmite 680 w resistor, 1/4 w r6 ok1015r52 ohmite 100 w resistor, 1/4 w r7 ok1015r52 ohmite 100 w resistor, 1/4w r8* rwr100 ohmite 0.1 w resistor, wirewound r9 ok1560r52 ohmite 56 w resistor, 1/4 w r10 ok2005r52 ohmite 20 w resistor, 1/4 w r11* mk6981f ohmite 6.98 k w resistor, 1/4 w, 1% r12 ok1015r52 ohmite 100 w resistor, 1/4 w r13 ok1015r52 ohmite 100 w resistor, 1/4 w t1* n34356 cramer magnetics transformercustom u1 uc3845bn on semiconductor controller ic z1 1n5242b on semiconductor 12 v, 500 mw zener diode z2 1n5248b on semiconductor 18 v, 500 mw zener diode * snubber components values to be assigned at prototyping
and8039/d http://onsemi.com 9 notes
and8039/d http://onsemi.com 10 notes
and8039/d http://onsemi.com 11 notes
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